[livres divers classés par sujet] [Informatique] [Algorithmique] [Programmation] [Mathématiques] [Hardware] [Robotique] [Langage] [Intelligence artificielle] [Réseaux]
[Bases de données] [Télécommunications] [Chimie] [Médecine] [Astronomie] [Astrophysique] [Films scientifiques] [Histoire] [Géographie] [Littérature]

Restrict Encoding for Mixed-Mode BIST

contributor ITI, Rechnerarchitektur
creator Hakmi, Abdul-Wahid
Holst, Stefan
Wunderlich, Hans-Joachim
Schloeffel, Juergen
Hapke, Friedrich
Glowatz, Andreas
date 2009-01
description Programmable mixed-mode BIST schemes combine pseudo-random pattern testing and deterministic test. This paper presents a synthesis technique for a mixed-mode BIST scheme which is able to exploit the regularities of a deterministic test pattern set for minimizing the hardware overhead and memory requirements. The scheme saves more than 50% hardware costs compared with the best schemes known so far while complete programmability is still preserved.
identifier  http://www.informatik.uni-stuttgart.de/cgi-bin/NCSTRL/NCSTRL_view.pl?id=INPROC-2009-59&engl=1
ISBN: ISBN: 978-0-7695-3598-2
ISBN: ISSN: 1093-0167
ISBN: DOI: 10.1109/VTS.2009.43
language eng
publisher IEEE Computer Society Conference Publishing Services
source In: 27th IEEE VLSI Test Symposium (VTS'09); Santa Cruz, California, USA; May 3-7, 2009, pp. 179-184
subject Reliability, Testing, and Fault-Tolerance (CR B.8.1)
Deterministic BIST
title Restrict Encoding for Mixed-Mode BIST
type Text
Article in Proceedings